fpga(kan_trig_reg)

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Tarasevih
Posts: 101
Joined: Fri Jul 09, 2021 11:26 am

fpga(kan_trig_reg)

Post by Tarasevih » Wed Sep 06, 2023 3:49 pm

Hi Tom.
Where can I learn more about this team (fpga(kan_trig_reg))?
I'm interested in what will happen with values equal to 0, 1, 2, 3, 4 and so on.
My task is to free all the bits so that I can control them from the C program.
And with any of the values \u200b\u200bwritten by this command, something stops working for me.

Regards,
Taras.

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TomKerekes
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Joined: Mon Dec 04, 2017 1:49 am

Re: fpga(kan_trig_reg)

Post by TomKerekes » Wed Sep 06, 2023 6:23 pm

Hi Taras,

The KAN_TRIG_REG FPGA register only contains 3 bits:

0 - enable Kanalog
1 - enable RS232/Uart
2 - Mux PWM0 to JP7 Pin5 IO 44 for KSTEP

So there would be no point in writing numbers greater than 7. Enabling/triggering Kanalog is handled internally when Kanalog is present. When Kanalog is present the Uart for Kanalog's RS232 port is automatically enabled, and the PWM/Mux for KStep is automatically disabled.

I'm not sure how this would be related to "freeing bits"
Regards,

Tom Kerekes
Dynomotion, Inc.

Tarasevih
Posts: 101
Joined: Fri Jul 09, 2021 11:26 am

Re: fpga(kan_trig_reg)

Post by Tarasevih » Wed Sep 06, 2023 7:00 pm

Yes, I understand Tom.
If I write down 7 will I activate everything?
All three bits will be 1.
Why when I write 0 I can't read bits 31 and 33 which I use for MPG ?
At the same time, if I write 4, then bits 31 and 33 are read normally ...
By writing zero, I reset all 3 bits, right?
Weird Tom sorry!
Perhaps I overworked.


Regards,
Taras.

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TomKerekes
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Re: fpga(kan_trig_reg)

Post by TomKerekes » Wed Sep 06, 2023 8:33 pm

Hi Taras,
If I write down 7 will I activate everything?
Yes but it wouldn't make sense as a KStep and Kanalog can't be both connected to JP7

Why when I write 0 I can't read bits 31 and 33 which I use for MPG ?
I can't reproduce that. Enabling Kanalog will use IO on JP7 not JP6. What are you doing exactly?
Regards,

Tom Kerekes
Dynomotion, Inc.

Tarasevih
Posts: 101
Joined: Fri Jul 09, 2021 11:26 am

Re: fpga(kan_trig_reg)

Post by Tarasevih » Thu Sep 07, 2023 5:40 pm

Hi Tom.
Today it was possible to free almost all ports and achieve normal operation of the MPG console.
I did not understand how it happened, but I turned off everything I knew.
The only thing I couldn't manage was to use Bit 35 and I had to transfer its function to another port with the number of Bit 7.
This code didn't work for 35 bit.
That being said, it works well for bit 7.

Code: Select all

      
       Jog(0,-1000);                         
       while (ReadBit(35)) ;                 
       Zero(0);                                   
       Jog(0,0);
In digital i/o everything is fine bit 35 input and it reacts to the sensor.
Everything is like in a fairy tale dear Tom.

Regards,
Taras.

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TomKerekes
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Re: fpga(kan_trig_reg)

Post by TomKerekes » Thu Sep 07, 2023 5:59 pm

Hi Taras,

Well if it works in the Digital IO Screen it should work in the C Program. One exception to this is that the Digital IO Screen only displays the status several times per second so if there are noise glitches on the signal they may not be displayed but the C Program will likely detect.

How are you driving the pin? IO Bit35 doesn't have any pull down resistance so it must be driven high and low by your circuit.
Regards,

Tom Kerekes
Dynomotion, Inc.

Tarasevih
Posts: 101
Joined: Fri Jul 09, 2021 11:26 am

Re: fpga(kan_trig_reg)

Post by Tarasevih » Thu Sep 07, 2023 6:34 pm

Well if it works in the Digital IO Screen it should work in the C Program. One exception to this is that the Digital IO Screen only displays the status several times per second so if there are noise glitches on the signal they may not be displayed but the C Program will likely detect.
That's the first thing I thought Tom.
But why does it all work on Bit 7 Pin 14 ?
Here is the diagram.
Pin IN.png
I just changed connector JP7 pin 14
One more off topic question please.
How to configure the KmotionCNC so that it runs in millimeters and not in inches from the start ?

Regards,
Taras.

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TomKerekes
Posts: 2546
Joined: Mon Dec 04, 2017 1:49 am

Re: fpga(kan_trig_reg)

Post by TomKerekes » Thu Sep 07, 2023 10:34 pm

Hi Taras,

That circuit should work.

Does the state on the Digital IO Screen show it is working properly when connected to Bit35?

Bits 34 and 35 can be configured as a Step/Dir Generator #3 outputs. If so configured the pins can not be used as GPIO. The Step/Dir Mux bit would need to be set to 1 and an axis would need to be configured as Step/Dir with Output Channel 3 to cause a problem.
How to configure the KmotionCNC so that it runs in millimeters and not in inches from the start ?
There is a Setup File to set initial Interpreter settings. See here. There should be a preinstalled MM.set file that you could use.
Regards,

Tom Kerekes
Dynomotion, Inc.

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