What would cause direct FPGA I/O to break?

Moderators: TomKerekes, dynomotion

SJHardy
Posts: 16
Joined: Thu Oct 03, 2019 12:36 am

Re: What would cause direct FPGA I/O to break?

Post by SJHardy » Mon Jun 01, 2020 9:07 pm

BigThread7 compiles and loads OK, but when I execute it there is no console print. If I comment out the array definition and change to a different printf, it works.

I could not see any obviously bad addresses in the load.

Attached linker files. I'll download the latest release and try it out.

Regards,
SJH
Attachments
linkerfiles.zip
(5.05 KiB) Downloaded 19 times

SJHardy
Posts: 16
Joined: Thu Oct 03, 2019 12:36 am

Re: What would cause direct FPGA I/O to break?

Post by SJHardy » Mon Jun 01, 2020 9:12 pm

PS:
I did notice there are some comments in cload_cinit() which are tagged with 'tktk':

if (temp == 0) // tktk skip 0 length pads

Stepping through with the debugger, I did notice that temp would in fact be zero every other time through the main loop of that function. Not sure how that's supposed to work, but from a naive perspective I would not have expected it to take that branch so often.

Regards,
SJH

SJHardy
Posts: 16
Joined: Thu Oct 03, 2019 12:36 am

Re: What would cause direct FPGA I/O to break?

Post by SJHardy » Mon Jun 01, 2020 9:59 pm

Found this thread re TI:
https://e2e.ti.com/support/tools/ccs/f/81/t/454222

So I added

i = i+7 & ~7; // SJH - align to 8

at the bottom of the loop in cload_cinit() and (lo and behold) it fixes my problem loading the supervisor. So I guess you should try it out on Windows too!

Regards,
SJH

User avatar
TomKerekes
Posts: 985
Joined: Mon Dec 04, 2017 1:49 am

Re: What would cause direct FPGA I/O to break?

Post by TomKerekes » Tue Jun 02, 2020 3:49 pm

SJH,

You're a genius! It works in Windows also and allows your .out file to load and run in V4.33q. Will add to the next release.
Regards,

Tom Kerekes
Dynomotion, Inc.

Post Reply